In recent years, the development of a back side illumination type solid-state imaging apparatus as a highly sensitive solid-state imaging apparatus has been advancing. Such a back side illumination type solid-state imaging apparatus is configured to include circuit elements, wiring layers and the like formed on the front surface side of a silicon substrate and allow light to enter into the back surface side of the silicon substrate to capture an image.
With the solid-state imaging apparatus having such a configuration, the aperture ratio for receiving light can be increased and the absorption or reflection of incident light towards the photoelectric conversion element can be suppressed.
For example, Patent Literature 1 discloses a conventional, back-surface light receiving type (back side illumination type) CMOS image sensor.
FIG. 9 is a diagram for describing the back side illumination type CMOS image sensor disclosed in Patent Literature 1. FIG. 9(a) schematically illustrates an overall configuration of the CMOS image sensor. FIG. 9(b) illustrates a circuit configuration of a unit pixel in the CMOS image sensor.
A CMOS image sensor 10 comprises: a pixel section 11 obtained by arranging pixels (hereinafter, also referred to as unit pixels) in rows and columns; a vertical selection circuit (V selection circuit) 12 for selecting, in a unit of one row, the pixels of the pixel section 11; and a signal processing circuit (S/H, CDS circuit) 13 for performing a noise reduction process on, and retaining, pixel signals from pixels in a pixel row selected by the vertical selection circuit 12. The signal processing circuit 13 performs a process of removing a fixed noise pattern for each pixel, on pixel signals from pixels of each of the selected rows.
The CMOS image sensor 10 further comprises: a horizontal selection circuit (H selection circuit) 14 for selecting and outputting pixel signals retained in the signal processing circuit 13 in order; an AGC circuit 16 for amplifying the pixel signals' output from the signal processing circuit 13 with an appropriate gain; an A/D converter 17 for converting the pixel signals amplified by the AGC circuit 16 into digital pixel signals; a digital amplifier 18 for amplifying and outputting the digital pixel signals; and a timing generating section (TG) 15 for generating timing signals for controlling each of the circuits described above.
As illustrated in FIG. 9(b), a unit pixel Px comprises: a photoelectric conversion element (photodiode) 21 for generating signal charges by photoelectric conversion of incident light; a transfer transistor 22 for transferring signal charges generated in the photodiode to an electric charge accumulating section FD; a reset transistor 25 connected in between a power source Vdd and the electric charge accumulating section FD for resetting electric charges of the electric charge accumulating section FD; and an amplifying transistor 23 and a selecting transistor (address transistor) 24 connected in series in between a reading signal line (vertical signal line) 27 and the power source Vdd. Here, the selecting transistor (address transistor) 24 is for selecting a row of pixels, and the amplifying transistor 23, the gate of which is connected to the electric charge accumulating section FD, is for amplifying and outputting an electric potential of the electric charge accumulating section FD.
Here, the gate of the transfer transistor 22 is connected with a transfer wire 26, the gate of the reset transistor 25 is connected with a rest wire 29, and the gate of the address transistor 24 is connected with an address wire 28. Further, one end of the vertical signal line 27 is connected with a constant current circuit I.
Further, the CMOS image sensor 10 is formed on a semiconductor substrate, such as a silicon substrate. Hereinafter, a region (pixel region) in which a pixel section is formed and a region (peripheral circuit region) in which peripheral circuits are formed, in the semiconductor substrate, will be described.
FIG. 10 illustrates a cross sectional structure of a pixel region and a peripheral circuit region of the semiconductor substrate.
Herein, an N− type silicon substrate 41 is used as the semiconductor substrate, and the thickness thereof is desirably                5 μm to 15 μm        
with regard to visible light, and it set to be                10 μm.        
In the pixel region of the N− type silicon substrate 41, a shallow, back surface P+ layer 42 is formed on one surface (back surface) side throughout the entire surface of the pixel section. Further, a pixel separating region for separating adjusting pixels is formed by a deep P well 43, which is connected with the back surface P+ layer 42.
A photodiode 37 is formed in an N− type region 44a, which is the region of the N− type silicon substrate 41 where the P well 43 is not formed. The N− type region 44a is a photoelectric conversion region. The area thereof is small and has a low impurity concentration so that it is completely depleted. An electric charge accumulating N+ region 44 is formed on the N− type region 44a, the region 44 accumulating signal charges (electrons). A front surface P+ layer 45 is formed further thereon for realizing an embedded photodiode. Herein, in the embedded photodiode, the front surface P+ layer 45 is formed on the front surface of the electric charge accumulating N+ region 44 to increase a concentration of holes which are likely to be coupled with noise electric charges (electrons) thermally generated due to crystal defects or the like on the front surface of the electric charge accumulating N+ region 44 for accumulating the signal charge (electrons), and suppress noise due to noise electric charges, except for signal charges, by shortening the life span of the noise electric charges.
The photodiode 37 is formed such that the surface area on the light receiving surface (back surface) side is formed to be larger than the surface area on the wiring layer (front surface side) side. As a result, incident light can be taken in efficiently. Signal charges photoelectrically converted by the N− type region 44a and accumulated by the electric charge accumulating N+ region 44, the regions which constitute the photodiode 37, are transferred to an N+ type region 47, functioning as an electric charge accumulating section (floating diffusion) FD, by a transfer transistor 46 (transfer transistor 22 in FIG. 9(b)). The N− type region 44a and electric charge accumulating N+ region 44 constituting the photodiode 37 are electrically separated from the N+ type region 47 constituting the electric charge accumulating section FD by an electric charge transfer P− layer 48.
The transistors (amplifying transistor 23, address transistor 24 and rest transistor 25 in FIG. 9(b)), except for the transfer transistor 46 within a pixel, are formed in a normal manner in the deep P well 43. On the other hand, with regard to the peripheral circuit region, a P well (Pwell) 49 is formed at a depth that does not reach the back surface P+ layer 42, and an N well (Nwell) 50 is further formed inside the P well 49, thus configuring a CMOS circuit formed in the regions of the wells 49 and 50.
In a solid-state imaging apparatus having such a configuration, a pixel structure is used such that a gate electrode and a wiring layer comprising a plurality of wires positioned further outside the gate electrode are formed on the outside of one of the surfaces on which a photoelectric conversion element of a silicon substrate is formed, and light is allowed to enter into the other surface of the silicon substrate, so that it will not be necessary to lay out the wiring in consideration of a light receiving surface.
Thus, the degree of freedom increases for the wiring that constitutes the pixel, thereby miniaturizing the pixel. Further, with regard to the silicon substrate 41, the surface area on the lighting surface side of the N− type region 44a, where photoelectric conversion is performed, is formed to be larger than the surface area on the side closer to the electric charge accumulating N+ region 44 for accumulating signal charges, so that incident light can be taken in efficiently.